Principal Verification Engineer
IC Resources View all jobs
- Cork
- Permanent
- Full-time
- Define and architect scalable UVM-based verification environments for complex controller IP
- Develop self-checking testbenches, scoreboards, and coverage models to support metric-driven verification
- Create and deploy assertions for both simulation and formal verification flows
- Own and maintain verification plans, ensuring alignment between specification and coverage targets
- Drive regression strategy and automation in collaboration with CAD/flow teams
- Work closely with RTL designers to debug and resolve challenging corner-case scenarios
- Contribute to technical reviews and quality processes across the development lifecycle
- Strong background in SystemVerilog and UVM in a production environment
- Extensive experience verifying complex digital IP or SoC subsystems
- Solid understanding of RTL design principles and debug methodologies
- Proven experience with coverage-driven verification strategies
- Exposure to AMBA-based protocols (e.g., AXI or CHI) would be beneficial